Various semiconductor devices, such as reverse bias diodes, field effect transistors (FETs), such as metal-oxide-semiconductor FETs (MOSFETs), and silicon controlled rectifiers (SCR), exhibit a snapback type of behavior in the current-voltage characteristics. The snapback behavior occurs when a sufficient voltage (i.e., a snapback trigger voltage) is applied across the semiconductor device. The voltage can lead to an avalanche generation of the voltage carriers within the device, which triggers a positive feedback mechanism in the device leading to more and more conduction. The voltage across the device drops to a low value due to a very low dynamic resistance. These devices are often used in electrostatic discharge (ESD) protection circuits because of their voltage snapback and low on state resistance can be used to facilitate discharge of the ESD current away from other components in a circuit.
It is desirable to accurately simulate the behavior of a circuit, including the ESD protection circuit and/or any device(s) exhibiting the snapback behavior, prior to manufacturing the circuit. Accurate simulation provides a better prediction of the behavior of the circuit, and can reduce the number of failures of circuit components due to improper operation, e.g., of the ESD protection circuit under an ESD event. Accurate simulation of a device that exhibits the snapback behavior can enable accurate prediction of the breakdown voltage, the on state resistance, and the pre-snapback behavior of the device. Simulating the positive feedback mechanism within the device exhibiting the snapback behavior can often lead to convergence problems during simulation.